With the rise of deep learning (DL), our world braces for Artificial Intelligence (AI) in every edge device, creating an urgent need for Edge-AI processing hardware. Unlike existing solutions, this hardware needs to support high throughput, reliable, and secure AI processing at ultra-low power (ULP), combined with a very short time to market.
With its strong position in edge solutions and open processing platforms, the EU is ideally positioned to become the leader in this edge-AI market. However, certain roadblocks keep the EU from assuming this leadership role: Edge processors need to become 100x more energy efficient; Their complexity demands automated design with 10x design-time reduction; They must be secure and reliable to gain acceptance; Finally, they should be flexible and powerful to support the rapidly evolving DL domain.
CONVOLVE addresses these roadblocks in Edge-AI. To that end, it will take a holistic approach with innovations at all levels of the design stack, including:
The CONVOLVE consortium includes some of Europe's strongest research groups and industries, covering the whole design stack and value chain. In a community effort, we will demonstrate Edge-AI computing in real-life vision and audio domains. By combining these innovative ULP and fast design solutions, CONVOLVE will, for the first time, enable reliable, smart, and energy-efficient edge-AI devices at a rapid time-to-market and low cost, and as such, opens the road for EU leadership in edge-processing.
We are seeking two highly skilled and motivated postdoc candidates to tackle any of the following four research topics (a single candidate will focus on one topic):
Topic 1: Ultra-low power CGRA for Dynamic ANNs and SNNs: Research and develop near-memory computing engines based on Coarse-Grained Reconfigurable Architectures (CGRA) using a flexible memory fabric for Dynamic Neural Networks. These designs need to be equipped with self-healing mechanisms to (partly) recover in the event of failures, enhancing system-level reliability. The accelerators may also have knobs to exploit near-threshold and approximate computing for extreme energy-efficient operation.
Topic 2: Design-flow for SNNs and ANNs implemented in compiler: Research and develop a high-quality compiler backend for CGRAs targets supporting SNNs and ANNs. Compared to existing solutions, the energy efficiency needs to be improved by exploiting SIMD, advanced memory hierarchy, data reuse, sparsity, software operand bypassing, etc.
Topic 3: Compositional performance analysis and architecture Design Space Exploration (DSE) of a System-on-Chip (SOC): Research and develop an infrastructure to model energy & latency at the SoC level, including the SoC level memory hierarchy and processing host, as well as integrating the different accelerator component models. To support rapid evaluations needed for the DSE, analytical models need to be pursued. The development of compositional models will moreover enable run-time performance assessment of an application when the platform configuration changes (dynamic SoC reconfiguration) due to a failing platform component.
Topic 4: Composable and Secure SoC accelerator platform: Research and develop novel composable and real-time design techniques to realize an ultra-low-power and real-time Trusted Execution Environment (TEE) for an SoC platform consisting of RISC-V cores with several accelerators. Different security features that protect against physical attacks need to be integrated into the SoC platform, while maintaining ultra-low-power and real-time requirements of the applications. The platform should allow easy and secure integration of Post-Quantum Cryptography accelerators and Compute-In-Memory (CIM) based hardware accelerators.
For both positions we are looking for excellent, teamwork-oriented, and research-driven candidates with a PhD degree in Electrical Engineering, Computer Science or AI related topic and strong hardware/software design skills.
Electronic Systems group
The Electronic Systems group (tue.nl/es) is a top research group consisting of five full professors, two associate professors, seven assistant professors, several postdocs, about 40 PDEng and PhD candidates, and support staff. The ES group is world-renowned for its design automation and embedded systems research. It is our ambition to provide a scientific basis for design trajectories of electronic systems, ranging from digital circuits to cyber-physical systems. The trajectories are constructive and lead to high-quality, cost-effective systems with predictable properties (functionality, timing, reliability, power dissipation, and cost). Design trajectories for applications that have strict real-time requirements and stringent power constraints are an explicit focus point of the group.
Do you recognize yourself in this profile and would you like to know more? Please contact
dr.ir. Sander Stuijk, s.stuijk[at]tue.nl, http://www.es.ele.tue.nl/~sander.
For information about terms of employment, click here or contact Mrs. Linda van den Boomen,
HR advisor l.j.c.v.d.boomen[at]tue.nl.
Please visit www.tue.nl/jobs to find out more about working at TU/e!
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